OK >Boot configuration Duration 21ms ECC 0 ECC 0 IsValidMBR: MBR sector = 0x800 (valid MBR) OpenPartition: Partition Exists=0x1 for part 0x20. Min:29 IsFlashBlockConfiguredForInternalEccCorrection 4, ff,ff, rc:0 ECC 0 INFO: Boot CFG. ECC 0 Checking bootloader blocks are marked as reserved (Num = 32). Quote Lecroy NAND XLDR, at 23:39:17 Version BSP_WINCE_ARM_A8 2.30.00.03.JMP Lecroy EBOOT 0.0, BSP BSP_WINCE_ARM_A8 2.30.00.03 TPS659XX Version 0x10 (ES1.1) > EBoot Boot Perf timer 1 Preparing for download. First boot after confirming the "BIOS upgrade" (The screen shows four colored squares and updates the block number during each ScreenPrint call logged) I think we can assume that the initial ECC algorithm used was too weak and eventually all scopes will need this recovery process and the "BIOS upgrade" which actually just re-computes NAND flash ECC data. ![]() The nature of NAND flash is to have a high probability of bit errors and it requires error correction. The MT29F4G16ABBDA3W NAND flash used also has OOB size 64 which is large enough for BCH-8. I think we can assume they are upgrading to BCH-8. The DM3730 is capable of hardware computed BCH-4 and BCH-8 however the silicon errata says that BCH-4 is completely broken. I think they were using the default Hamming correction which can only correct for 1 bit error. By watching the serial console output during boot I can see that what this "BIOS" update actually does is upgrade the NAND flash ECC algorithm. ![]() The WS3K (non-Z) uses the TI DM3730 OMAP3 SoC, for which there is no such thing as a "BIOS".
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